1. Field of the Invention
This invention relates to an artificial neural network (ANN), particularly to a neuron component and its activation function including the derivative.
2. Description of the Related Art
One of the artificial neural networks"" most important components is the neuron, whose performance and complexity greatly affect the whole net. In many literatures, its activation function is found to be the sigmoid. Most of the analog implementations have used differential pair for generating the required function. In some cases, such as on-chip back-propagation learning, both a non-linear function and its derivative are required. Neurons that can meet the requirement have been presented. Most of these have voltage inputs and the current outputs. Since most of the applications employ current output synapses and voltage output neurons in order to enable the summation of those currents by simply connecting them together at the input of the neuron and to diverge signals from a neuron to a large quantity of synapses, these circuits a little bit inconvenient. In addition, some circuits are biased in the subthreshold region, so its driving capability is quite limited.
Therefore, an object of the invention is to provide a novel neuron circuit, which has current input and voltage outputs and is built with strong-inversion biased transistors, thereby realizing both a neuron activation function and its derivative.
Another object of the invention is to provide a novel neuron circuit, which enables threshold and gain factor adjustability and has high noise immunity.
Another object of the invention is to provide novel neuron circuit, which is very beneficial to on-chip learning neural networks.
To realize the above and other objects, the invention provides a novel neuron circuit, which is very beneficial to on-chip learning neural networks. The neuron circuit comprises: a pair of transistors having a first common terminal connected to a first input voltage, a second common terminal connected to a first output, a first gate connected to a second input voltage, and a second gate connected to a third input voltage; a surface field-effect transistor having a first terminal and a third gate connected together to the first output, which is connected to a first current source, and a second terminal connected to a second current source; and a first differential pair of transistors, having a third common terminal connected to a third current source, a first gate connected to the first output, a second gate connected to a fourth input voltage, a first terminal connected to a first load to form a connecting point as a second output, and a second terminal connected to a second load; a second differential pair of transistors, having a fourth common terminal connected to the third current source, a third gate connected to the first gate of the first differential pair of transistors output, a fourth gate connected to a fifth input voltage, a third terminal connected to a third load to form a connecting point as a third output, and a fourth terminal connected to a fourth load.
In the neural network, a neuron circuit design is the key point for the performance. In the invention with simple neuron circuit design, it can easily reach a requirement of errorless effect and decrease the time delay to within 1 ns. The circuit also has a large dynamic range and a high noise immunity using the adjustable threshold and gain factor. Therefore, these features make it quite fit for hardware realization besides its programmability.